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Call Identifier: ICT Call 8 (FP7-ICT-2011-8)
Challenge: Challenge 3: Alternative Paths to Components and Systems
Objective: 3.1 Very Advanced Nanoelectronics Components: Design, Engineering, Technology and Manufacturability
Funding Schemes: STREP
Evaluation Scheme: One Step Proposal
Closure Date: 17/01/2012
Country: Spain
The aim of this project is the creation of a new standard modelling language and a methodology to unify the design, the integration and the simulation of advanced nanoelectric components and infrastructures. Such standard will be based on the SysML (Systems Modelling Language) specifications, adapting them to the principles and specific requirements of nanoelectric engineering. SysML is a general purpose modelling language for system engineering and smart embedded applications. Extending SysML with the modelling primitives relevant to the nanoelectric domain will provide for creating a domain-specific modelling language for advanced nanoelectric components. This language is expected to facilitate the specification of a wide variety of nanoprocesses, providing flexibility and extensibility to nanoelectric components design and production tasks.

Current Action Plan of European Strategy for Nanoelectronic focuses on further miniaturisation and increased performance in electronic and photonic components, in micro/nanosystems integrating functionalities like sensing, actuating, communicating, in alternative routes to new components and systems such as organic electronics and in multicore computing systems, embedded systems, monitoring and control, and cooperating complex systems.
On the methodology part, this research will focus on the creation of a model-driven development process around the newly developed language. This process will facilitate the integration of smart system design into nanoelectric component production. The process will clearly distinguish different modelling phases at various abstraction levels to maximize reuse opportunities and simplify the production of circuit-technology solutions. Some of these phases could be (semi)automated, further improving the productivity and quality of the resulting nanocomponents..

The language and the methodology will be supported by an appropriate set of modelling tools that will be developed as part of the proposed project and will be contributed to the open source community. These tools will help designers and researchers to communicate and share their work in a homogeneous, dedicated software environment.

The new standard language and support environment will have a remarkable impact on the modelling for new materials, processes and devices, as well as on other design and simulation features, including software controllers and design requirement specifications. This impact will be validated by integrating the tools into the design processes of the developed nanoelectric components in key areas such as the electric industry or the environment. A thorough formative assessment process will accompany the project from its beginning to provide real-time feedback on usability and value delivered to the entire value chain in the nanoelectric domain.
CMOS technology has long been the key driver for microelectronics. The power of CMOS technology is based on its ability to carry out digital calculations while consuming very little electrical power.
While the development of CMOS technology is expected to continue well into the next decade, inevitably a point is reached where today’s semiconductor circuits meet their physical limits.
Economical limits to device scaling could be reached even before that. For this reason, it is essential to explore new ideas and alternative technologies in order to create novel computing devices capable of replacing CMOS technology in the 2020 or beyond timeframe.
The novel devices should show significant advantage over ultimate CMOS transistors in power, performance, density, and/or cost to enable the semiconductor industry to extend the historical cost and performance trends for information technology.

The idea of this project is to develop a manufacturing modelling tool, which would be able to help in the manufacture and in the design of new nanoelectric components. There are two major modelling and dessign issues to be treated in this project:

o Bottom-up techniques
o Multiscale modeling and design tools

Required skills and Expertise:

-Experts using computer-based applications for a holistic design of a nanocomponent
-Expertise using SysML modelling language
-Capacity of performing experiments and show case demonstrations with the results of the project

Description of work to be carried out by the partner(s) sought:

-Experts using computer-based applications for a holistic design of a nanocomponent
-Expertise using SysML modelling language
-Capacity of performing experiments and show case demonstrations with the results of the project

Type of partner(s) sought:

-Project management and assessment
-Requirements specification
-Research for SysML representation of Beyond-CMOS and advanced More-than-Moore nanocomponents
-Development of a nanoelectric SysML editor
-Development of a 3D visualization tool
-Design and integration with nanoCMOS including 3D integration
-Show case installation and testing
-Exploitation, dissemination and IPRs planning

For further information please contact:

Jaime Durán  jaime.duran@juntadeandalucia.es  
ICT Sector
CESEAND
CITAndalucía